Adding PCB ESD Protection to Your Design

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Upverter Expert - Adding PCB ESD Protection to Your Design

Electrostatic discharge (ESD) occurs when two objects with different net charges come very close together. At a close distance, the electric field between these objects becomes very large and causes the medium between them to breakdown. In PCBs, a discharge usually originates when the user touches the board, or when metal held at a high voltage nears a conductor on the board.

Usual activities like plugging cables in/out, pushing buttons, or using a screen or keys can result in electrostatic discharge. This discharge can cause a high current pulse in the system that can damage ICs and other components on board. PCB designers need to be aware of some simple strategies for PCB ESD protection in their design.

Components for PCB ESD Protection

There are some components that can be added to your board from your parts library to protect against voltage spikes due to ESD. These components are usually grouped together as ESD suppressors. Here are some components you can use for ESD protection in your next design:

TVS diodes

Transient voltage suppression (TVS) diodes can be used to fix the voltage on a line to a safe level. A TVS diode is actually an array of diodes arranged in such a way as to provide very high impedance to normal range voltages. TVS diodes can be constructed in a loop arrangement (shown below) using two p-n diodes and a Zener diode. You can also use a back-to-back diode without forming a loop arrangement, or you can use an integrated circuit that provides TVS.

When a voltage surge occurs across the TVS diode, the diode will provide a path to ground for current before it can damage any components on the protected line line. The loop arrangement below causes current to dissipate to ground as to moves around the diode loop.

ESD1TVS diode for ESD protection


Capacitors connected to ground act like a high impedance source for any DC voltage, while they act as a short circuit for high frequency voltages. By strategically placing capacitors with the proper value on sensitive nodes, voltage surges can be discharged to ground safely. This method can potentially make the node respond slower and might cause a distortion of digital data. For this reason, capacitors are not normally used for PCB ESD protection in high speed designs.

ESD-Aware PCB Design Strategies

Placement of the ESD Suppressor

After choosing an ESD suppressor that is compatible with the electrical characteristics of your circuit, the next important consideration is its placement. The placement should be done such that IC receives the lowest possible voltage surge if ESD occurs. For moderate frequency signals and for typical ESD pulses, PCB traces act like inductors, meaning their impedance increases with frequency (ωL). The circuit with the TVS diode above now looks like this:

Effect of line inductance on ESD

From the figure above, we can clearly see that the diode will be triggered quickly when L2>>L1. This will also mean that most of the current will get steered away from the protected line and L2 will also dissipate any ESD left on the protected line. This means we need to place the TVS diode as close as possible to the location where ESD might occur. There should be minimum inductance on the ESD suppressor connections to the line or ground. The energy of ESD pulse decreases as the trace length increases, so the trace length between the ESD suppressor and the protected IC should be as long as possible.

Limiting EMI from ESD

ESD produces strong voltage pulses that can produce electromagnetic interference (EMI) on other nearby signal lines. The primary source of radiation is between the ESD source and the suppressor, which acts as an antenna. If possible, you should keep the suppressor area away from other circuits and unprotected traces, otherwise they can carry the ESD signal to other ICs. Even without considering the inductances of each line, the protected and an adjacent unprotected line can act like a capacitor, which allows the voltage surge to pass between the two lines. The following figure illustrates how an ESD pulse can couple to an unprotected line:

ESD3ESD coupling to nearby traces because the two traces act like a capacitor

Vias Between the ESD Source and Suppressor

If there are any vias between the ESD source and suppressor, the via can also cause coupling to an unprotected line. Ideally, there should not be any vias between the ESD source and suppressor, as it increases the length of the line, causing more inductance on the line. This has two detrimental effects:

  • It will increase the ESD pulse energy in the protected line
  • It will increase the signal generated by the unprotected line through EMI

If the designer has no choice but to add a via, then they must make sure the protected line and suppressor are on the same side of the board, and the source is connected to the protected line only after the via (Case1 in the figure below). The worst possibility is that the source and protected line are on the same side, while the suppressor is on the other side; this should be avoided (Case2). In this case, it is best to use another via to connect the protected line after the ESD suppressor rather than connecting the ESD source directly to the protected line (Case3).

ESD-viaHow to add a via to reduce the impact of ESD on a protected line

Proper Ground Routing Can Reduce ESD

We saw earlier that we need to reduce the trace inductance between the source and the TVS diode to direct the voltage pulse away from the IC which we need to protect. The earlier image assumed that the suppressor has a good ground connection. In reality there might be some inductance between the ESD source and the TVS diode, or between the TVS diode and ground; this is shown in the figure below:

ESD2Parasitic inductance on the suppressor can direct more ESD voltage back to the IC

We can lower L3 by placing the TVS as close to the source as possible. In order to reduce L4, we need to connect the TVS ground pin directly to the ground plane using a via. If a direct connection is not possible, then use multiple vias in parallel on the trace that runs to the ground plane. You should make the drill diameter on each via and pad size larger to increase the surface area (to combat the skin effect). A ground via on a TVS suppressor should be filled with non-conductive material to keep the surface area large.

It is a good idea to incorporate ESD protection early so that you don’t need to make any last-minute changes to a complex layout. If you’re looking to create your next schematic and layout in an easy-to-use online PCB design platform, Upverter® provides these tool and many more,  allowing your to design boards from start to finish. As a cloud-based tool, Upverter allows users to share their designs, roll back to previous design versions, and access their data from anywhere.

You can sign up for free and get access to the best browser-based PCB editor, schematic editor, and component database. Visit Upverter today to learn more.

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